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1. Frogger Frogger Public

   A simplified FPGA based implementation of the Frogger game on a 16×16 LED matrix, written in SystemVerilog and deployed using Quartus.

   SystemVerilog

2. Freddie-An-Expressive-Robotic-Face Freddie-An-Expressive-Robotic-Face Public

   Freddie is a robotic mask that brings facial expressions to life using dual ESP32 boards, FreeRTOS, and ESP-NOW wireless communication. Freddie demonstrates real-time task scheduling, wireless sync…

   C++

3. Freddie-2.0 Freddie-2.0 Public

   Expressive robotic face with custom-trained emotion recognition, AI conversations, and servo animations.

   Python

4. 5-Stage-Pipelined-CPU 5-Stage-Pipelined-CPU Public

   64-bit ARM-style CPU in SystemVerilog with single-cycle and 5-stage pipelined implementations, including hazard detection and data forwarding.

   SystemVerilog

5. cmos-register-file cmos-register-file Public

   Full-custom CMOS 13×16 register file built from scratch and verified in HSPICE at 1 GHz

   Cython

6. vortex4dice vortex4dice Public

   Forked from jiayi-wang98/vortex4dice

   Verilog