From b784e8b33277bd773375aecc800c25eb50f53582 Mon Sep 17 00:00:00 2001
From: Daniel Kroening <dkr@amazon.com>
Date: Fri, 19 Dec 2025 14:56:40 -0800
Subject: [PATCH] Verilog: KNOWNBUG test for using identifier of instance in
 instance array

---
 .../verilog/modules/instance_array2.desc      |  9 +++++++++
 regression/verilog/modules/instance_array2.sv | 19 +++++++++++++++++++
 2 files changed, 28 insertions(+)
 create mode 100644 regression/verilog/modules/instance_array2.desc
 create mode 100644 regression/verilog/modules/instance_array2.sv

diff --git a/regression/verilog/modules/instance_array2.desc b/regression/verilog/modules/instance_array2.desc
new file mode 100644
index 000000000..9c3502c3b
--- /dev/null
+++ b/regression/verilog/modules/instance_array2.desc
@@ -0,0 +1,9 @@
+KNOWNBUG
+instance_array2.sv
+
+^file .* line 9: no support for instance arrays$
+^EXIT=2$
+^SIGNAL=0$
+--
+--
+This does not parse.
diff --git a/regression/verilog/modules/instance_array2.sv b/regression/verilog/modules/instance_array2.sv
new file mode 100644
index 000000000..1412d6b41
--- /dev/null
+++ b/regression/verilog/modules/instance_array2.sv
@@ -0,0 +1,19 @@
+// 1800-2017 23.3.3.5
+
+module sub(input i);
+endmodule
+
+module main;
+
+  sub my_instance[8:1](8'b1111_0000);
+
+  initial #1 assert(my_instance[1].i == 0);
+  initial #1 assert(my_instance[2].i == 0);
+  initial #1 assert(my_instance[3].i == 0);
+  initial #1 assert(my_instance[4].i == 0);
+  initial #1 assert(my_instance[5].i == 1);
+  initial #1 assert(my_instance[6].i == 1);
+  initial #1 assert(my_instance[7].i == 1);
+  initial #1 assert(my_instance[8].i == 1);
+
+endmodule